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HBM Allocation to AI Datacenters Reprices Consumer Electronics — Wafer Capacity Constraint Bites

Published 2026-05-22Ingested 2026-05-25AI Infrastructure and ComputeMedium

Summary

David Oks' analysis, surfaced by Simon Willison, lays out the wafer-capacity arithmetic behind the consumer memory shortage now repricing low-end electronics. Three memory manufacturers control DDR (desktops/servers), LPDDR (mobile), and HBM (GPUs) production, all sharing a fixed wafer pool. HBM allocation has gone from 2% to an expected 20% of wafer capacity by end-2026 driven by AI datacenter demand, and critically, a gigabyte of HBM consumes more than 3x the wafer capacity of a gigabyte of DD

Alignment: Neutral
Related Positions: AI Infrastructure Strategy
hbm-memorywafer-capacityai-infrastructure-supply-chainconsumer-electronicsmemory-shortagedavid-oks
HBM Allocation to AI Datacenters Reprices Consumer Electronics — Wafer Capacity Constraint Bites — Intelligence — Agentic Developer Tools Radar · Signal